2D semiconductor FET transistors: Characteristics, fabrication and modelling

The metal-oxide-semiconductor field effect transistor, where silicon is the semiconductor material, Si MOSFETs, and their successors FINFETs and multigates devices (nanowires, nanosheets, stacked devices, etc) are at present, the basic semiconductor device allowing the tremendous development reached by actual semiconductor industry to meet the requirements of data processing, artificial intelligence mobile devices and other techniques necessary for economic, social, and scientific development.
To achieve the required demands, it has been necessary a constant reduction of the transistor size, which has the prediction of Moore´s Law, of duplicating the number of transistors in a chip every two-three year. This miniaturization process has had to overcome important problems related to parasitic effects present in bulk materials called short channel effects (SCEs). For example, as the channel length is reduced, the device current in the below threshold regime will increase, and so, the static power consumed.
However, in bulk 3D semiconductors, the reduction of xs, increases the threshold voltage VT., due to the increase of defects as dangling bonds and interface states at the interface of the semiconductor/dielectric. At the same time, mobility decreases as []xs6 due to the increase in carrier scattering at the surface. In general, for ultrathin 3D FETs, the electrostatic control of carriers in the channel is reduced, while the leakage current increases.
On the contrary, in a two-dimensional (2D) material, electrons can be naturally confined within a very thin channel formed by few monoatomic layers, where carriers can in principle uniformly controlled by the gate voltage, while the leakage current reduces.
For the above reasons, during the last years, much work has been done regarding the possibility of using 2D semiconductors to overcome the above-mentioned limitations in further scaling of 3D semiconductor devices. In this talk, we will analyse some of these characteristics, as well as results obtained in fabricating 2D semiconductor FETs, using different methods. Finally, we will present some work done on modelling these new devices, already available and discuss challenges to overcome.
Co-sponsored by: Centro Universitario FEI
Speaker(s): Dr. Magali Estrada,
Centro Universitario FEI, Av. Humberto de A. C. Branco, 3972, Sao Bernardo do Campo, Sao Paulo, Brazil, 09850901