CASS Talks with Sandro Ferreira, Unisinos, Brazil – August 12, 2022


Abstract: Discrete-time (DT) receiver (RX) architectures offer low-power implementation, high configurability, and easy portability to ever finer CMOS nodes. Such features are highly desirable in IoT applications. To fully explore their advantages, a deep understanding of the signal processing including aliasing impairments is critical. However, such a discussion has not been sufficiently explored in literature. In this talk, we start with the basics of passive DT filters, which are at the core of a DT-RX. Next, a high-intermediate-frequency (IF) architecture is chosen to demonstrate how aliasing is an intrinsic part of a DT-RX and how it affects key system design aspects. Further on, we discuss the application of decimation techniques and the stringent trade-offs involved. Short Bio: Sandro Binsfeld Ferreira received his B.S. degree in electronics engineering from the Technological Institute of Aeronautics in 1992, the M.S. degree in electrical engineering from the Pontifical Catholic University of Rio Grande do Sul in 2005, and the Ph.D. degree in microelectronics from the Federal University of Rio Grande do Sul in 2016. He joined Unisinos University in 2011, where he is an Associate Professor and researcher at the Institute of Semiconductors. From 2009 to 2014, he was an RF IC Design Instructor with the IC Brazil Program in which a full curriculum in IC design is taught. In 2014, he was a Visiting Researcher with the Delft University of Technology in The Netherlands. Since 2017, he is a consultant with Orca Systems, San Diego, USA. He is an IEEE Senior Member and a member of the SSCS/EDS South Brazil Joint Chapter board. His current research interests include analog and RF integrated circuits design, and wireless communications systems. Virtual: